When citing the Mont-Blanc project, we would be grateful if you could cite our paper "SUPERCOMPUTING WITH COMMODITY CPUS: ARE MOBILE SOCS READY FOR HPC?", winner of the Best Student Paper Award during the 2013 edition of the Supercomputing Conference.

Found 110 results
T. Martsinkevich, Subasi, O., Unsal, O., Cappello, F., and Labarta, J., Fault-Tolerant Protocol for Hybrid Task-Parallel Message-Passing Applications. FTS’2015 1st International Workshop on Fault Tolerant Systems, 2015.
F. Mantovani, High Performance Computing based on mobile embedded processors. EMiT2015, 2015.
O. Subasi, Zyulkyarov, F., Unsal, O., and Labarta, J., Marriage Between Coordinated and Uncoordinated Checkpointing for The Exascale Era. HPCC’15: 17th IEEE International Conference on High Performance Computing and Communications, 2015.
R. Nishtala, Tallada, M. Gonzalez, and Martorell, X., A Methodology to Build Models and Predict Performance-Power in CMPs, 2015, pp. 193-202.
O. Suabsi, Arias, J., Unsal, O., Labarta, J., and Cristal, A., NanoCheckpoints: A Task-based Asynchronous Dataflow Framework for Efficient and Scalable Checkpoint/Restart. PDP’2015 In Proc. International Conference on Parallel, Distributed and Network-based Processing, 2015.
M. García, Vallejo, E., Beivide, R., Camarero, C., Valero, M., Rodríguez, G., and Minkenberg, C., On-the-Fly Adaptive Routing for dragonfly interconnection networks. The Journal of Supercomputing, 2015.
R. Nou, Miranda, A., and Cortes, A., Performance Impacts with Reliable Parallel File Systems at Exascale Level, 2015.
O. Subasi, Arias, J., Unsal, O., Labarta, J., and Cristal, A., Programmer-directed Partial Redundancy for Resilient HPC. Proceedings of 12th conference on ACM Computing Frontiers, 2015.
C. Camarero, Vallejo, E., and Beivide, R., Topological Characterization of Hamming and Dragonfly Networks and Its Implications on Routing, vol. Volume 11, no. Issue 4. ACM Transactions on Architecture and Code Optimization (TACO), 2015.
A. Butko, Garibotti, R., Ost, L., Lapôtre, V., Gamatié, A., G., S., and Adeniyi-Jones, C., A Trace-driven Approach for Fast and Accurate Simulation of Manycore Architectures. 20th Asia and South Pacific Design Automation Conference (ASP-DAC), 2015.
M. Benito, Vallejo, E., and Beivide, R., On the Use of Commodity Ethernet Technology in Exascale HPC Systems, presented at the 12/2015, Bangalore, India, 2015.
V. Garcia, Rico, A., Villavieja, C., Carpenter, P., Ramirez, A., and Navarro, N., Adaptive Runtime-Assisted Block Prefetching on Chip-Multiprocessors, 2014.
F. Mantovani, BoF 13: The European Approach to Exascale, ISC14. Leipzig, Germany. 2014.
P. Carpenter, Building supercomputers from commodity embedded chips. 2014.
A. Ramirez, Building supercomputers from embedded technologies. 2014.
P. Fuentes, Bosque, J. Luis, Beivide, R., Valero, M., and Minkenberg, C., Characterizing the Communication Demands of the Graph500 Benchmark on a Commodity Cluster. In Proceedings of the 2014 IEEE/ACM International Symposium on Big Data Computing (BDC '14), 2014.
I. Tanasic, Vilanova, L., Jorda, M., Cabezas, J., Gelado, I., Navarro, N., and Hwu, W. - M., Comparison Based Sorting for Systems with Multiple GPU. Sixth Workshop on General Purpose Processing Using GPUs, 2014.
E. Francesquinia, Castroc, M., Penna, P. H., Dupros, F., Freitas, H. C., Navaux, P. O. A., and Mehaut, J. - F., On the Energy Efficiency and Performance of Irregular Application Executions on Multicore, NUMA and Manycore Platforms. Journal of Parallel and Distributed Computing, 2014.
S. McIntosh-Smith, Energy Efficiency as a Cross-Cutting issue for Exascale Software, ISC14. Leipzig, Germany. 2014.
I. Grasso, Radojkovic, P., Rajovic, N., Gelado, I., and Ramirez, A., Energy Efficient HPC on Embedded SoCs: Optimization Techniques for Mali GPU, 2014.
D. Broemmel, Experience with StarSS­ -- off and on a GPU, Porting large production codes to SMPSs/OmpSs, CECAM Workshop: Exploiting heterogeneous multi-core and many-core platforms for atomic and molecular simulations, Daresbury, September 10-12, 2014. 2014.
C. Haine, Aumage, O., Petit, E., and Barthou, D., Exploring and Evaluating Array Layout Restructuration for SIMDization, 2014.
S. McIntosh-Smith and Hunt, R., Fault Tolerance Techniques for Sparse Matrix Methods. 2014.
A. Auweter, High Performance Computing on ARM Hardware. The Mont-Blanc Project. 2014.
H. Servat, Llort, G., Giménez, J., and Labarta, J., Identifying code phases using piece-wise linear regressions. 28th IEEE International Parallel & Distributed Processing Symposium (IPDPS), pp. 941-951, 2014.